丝印：8L；Package：SOT8009；50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint • Qualified according to AEC-Q

文件：366.42 Kbytes 页数：20 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

50 V, 100 mA NPN resistor-equipped transistors

100 mA NPN Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks.\nTable 1. Product overview Type number\n R1\n R2\n Package\n PNP complement:\n kΩ\n kΩ\n Nexperia\n • 100 mA output current capability\n• Built-in resistors\n• Simplifies circuit design\n• Reduces component count\n• Reduces pick and place costs\n• Low package height of 0.5 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint\n• Qualified according to AEC-Q101 and recommended for u;

Nexperia

安世

Package：3-XDFN 裸露焊盘；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置 描述：PDTC123JQC-Q/SOT8009/DFN1412D-

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

NPN resistor-equipped transistors; R1 = 2.2 kOHM, R2 = 47 kOHM

DESCRIPTION NPN resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and ampli

文件：92.63 Kbytes 页数：14 Pages

PHI

飞利浦

NPN resistor-equipped transistor

DESCRIPTION NPN resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and ampli

文件：66.26 Kbytes 页数：8 Pages

PHI

飞利浦