丝印：D4；Package：DFN1110D-3；50 V, 100 mA PNP resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：362.29 Kbytes 页数：20 Pages

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50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint • Qualified according to AEC-Q

文件：363.53 Kbytes 页数：20 Pages

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丝印：D4；Package：DFN1110D-3；50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1110D-3 (SOT8015) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：363.08 Kbytes 页数：20 Pages

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安世

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：365.74 Kbytes 页数：20 Pages

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安世

丝印：6F；Package：DFN1412D-3；50 V, 100 mA PNP resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：365.87 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint • Qualified according to AEC-Q

文件：366.42 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：6F；Package：DFN1412D-3；50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：365.63 Kbytes 页数：20 Pages

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安世

丝印：TA124X；Package：SC-43A；PNP resistor-equipped transistors; R1 = 22 kW, R2 = 47 kW

Features * Built-in bias resistors * Simplifies circuit design * 100 mA output current capability * Reduces component count * Reduces pick and place costs

文件：205.18 Kbytes 页数：13 Pages

NEXPERIA

安世

PNP resistor-equipped transistors; R1 = 22 kohm, R2 = 47 kohm

DESCRIPTION PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and amplif

文件：93.61 Kbytes 页数：14 Pages

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PNP resistor-equipped transistors; R1 = 22 kW, R2 = 47 kW

General description PNP Resistor-Equipped Transistors (RET) family. Features ■ Built-in bias resistors ■ Reduces component count ■ Simplifies circuit design ■ Reduces pick and place costs ■ 100 mA output current capability Applications ■ Digital applications ■ Cost-saving alternative for

文件：90.31 Kbytes 页数：12 Pages

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