PCA9601DP中文资料Dual bidirectional bus buffer数据手册恩XP规格书

描述 Description

The PCA9601 is designed to isolate I²C-bus capacitance, allowing long buses to bedriven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is ahigher-speed version of the P82B96 and a higher drive version of the PCA9600 thatallows many more Fast-mode Plus (Fm+) slaves on remote daughter cards in applicationswith temperature range of 0 °C to 85 °C.
It creates a non-latching, bidirectional, logic interface between a normal I²C-bus and arange of other higher capacitance or different voltage bus configurations. It can operate atspeeds up to at least 1 MHz, and the high drive side is compatible with the Fast-modePlus specifications.
The PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interfacemaking it suitable for interfacing with buses that have non I²C-bus-compliant logic levelssuch as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.
15 mA drive capability over 0 °C to 85 °C at SX/SY allows driving a 5 V Fm+ bus with470 pF loading.
The separation of the bidirectional I²C-bus signals into unidirectional TX and RX signalsenables the SDA and SCL signals to be transmitted via balanced transmission lines(twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RXsignals may be connected together to provide a normal bidirectional signal.

特性 Features

Bidirectional data transfer of I²C-bus signals
15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads
Isolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side
1 MHz operation on up to 20 meters of wire (see AN10658)
Supply voltage range of 2.5 V to 15 V with I²C-bus logic levels on SX/SY sideindependent of supply voltage
Splits I²C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interfacewith opto-electrical isolators and similar devices that need unidirectional input andoutput signal paths
Low power supply current
ESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO8 and TSSOP8 (MSOP8)

应用 Application

Interface between I²C-buses operating at different logic levels (for example, 5 V and3 V or 15 V)
Interface between I²C-bus and SMBus (350 μA) standard or Fm+ standard
Simple conversion of I²C-bus SDA or SCL signals to multi-drop differential bushardware, for example, via compatible PCA82C250
Interfaces with opto-couplers to provide opto-isolation between I²C-bus nodes up to1 MHz
Long distance point-to-point or multipoint architectures