PCA9511A数据手册ONSEMI中文资料规格书

描述 Description

The PCA9511A is a hot swappable I2C bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9511A provides bidirectional buffering, keeping the backplane and card capacitances isolated.The PCA9511A rise time accelerator circuitry allows the use of weaker DC pull up currents while still meeting rise time requirements. The PCA9511A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a low current mode when asserted LOW, and an open drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW). During insertion, the PCA9511A SDA and SCL lines are precharged to 1 V to minimize the current required to charge the parasitic capacitance of the chip.

特性 Features

Bidirectional Buffer for SDA and SCL Lines Increases FanOut andPrevents SDA and SCL Corruption During Live Board Insertion andRemoval from Multipoint Backplane Systems
V/t Rise Time Accelerators on all SDA and SCL lines
Active HIGH ENABLE Input
Active HIGH READY OpenDrain Output
HighImpedance SDA and SCL for VCC = 0 V
1 V precharge on all SDA and SCL Lines
Supports Clock Stretching and Multiple Masterarbitration/Synchronization
VCC Operating Range: 2.7 V to 5.5 V
I2C and SMBus SCL Clock Frequency up to 1 MHz
Alternate Features forPCA9510A/PCA9512A/PCA9513A/PCA9514A
Available in: Micro8, SOIC8
ESD Performance: 8000 V HBM, 600 V MM, 2000V CDM