8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM

General description The P89LPC930/931 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC930/931 is based on a high performance processor architecture that executes instructions in t

文件：277.92 Kbytes 页数：55 Pages

恩XP

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash

General description The P89LPC9301/931A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incor

文件：312.27 Kbytes 页数：65 Pages

恩XP

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash

General description The P89LPC9301/931A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incor

文件：312.27 Kbytes 页数：65 Pages

恩XP

8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM

General description The P89LPC930/931 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC930/931 is based on a high performance processor architecture that executes instructions in t

文件：277.92 Kbytes 页数：55 Pages

恩XP

8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM

文件：260.44 Kbytes 页数：55 Pages

PHI

飞利浦

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash

OverviewThe P89LPC9301/931A1 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into th \n\n2.1 Principal features\n\n\n\n•4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.\n\n•256-byte RAM data memory.\n\n•Two analog comparators with selectable inputs and reference so;

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恩智浦

8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM

Overview The P89LPC930/931 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC930/931 is based on a high performance processor architecture that executes instructions in two to four clocks high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is 6 times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance result;

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恩智浦

IC MCU 8BIT 8KB FLASH 28TSSOP

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恩智浦