丝印：P14；Package：SOT563；PNP PRE-BIASED SMALL SIGNAL DUAL SURFACE MOUNT TRANSISTOR

Features - Epitaxial Planar Die Construction - Complementary NPN Types Available (DDC) - Built-In Biasing Resistors - Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) - Halogen and Antimony Free. “Green” Device (Note 3) - Qualified to AEC-Q101 Standards for High Reliability

文件：282.89 Kbytes 页数：6 Pages

DIODES

美台半导体

丝印：P14；Package：SOT523；PNP PRE-BIASED SMALL SIGNAL SURFACE MOUNT TRANSISTOR

Features - Epitaxial Planar Die Construction - Complementary NPN Types Available (DDTC) - Built-In Biasing Resistors, R1R2 - Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) - Halogen and Antimony Free Green Device (Note 3) - Qualified to AEC-Q101 Standards for High Reliability

文件：349.06 Kbytes 页数：6 Pages

DIODES

美台半导体

丝印：P14；Package：SC-88A；TinyLogic ULP-A Inverter with Schmitt-Trigger Input

The NC7SP14 is a single inverter with Schmitt−Trigger Input in tiny footprint packages. The device is designed to operate for VCC = 0.9 V to 3.6 V. Features • Designed for 0.9 V to 3.6 V VCC Operation • 2.6 ns tPD at 3.3 V (Typ) • Inputs/Outputs Over−Voltage Tolerant up to 3.6 V • IOFF Sup

文件：347.91 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

丝印：P14；Package：SC-88；TinyLogic ULP-A Dual Inverter with Schmitt-Trigger Input

The NC7WP14 is a dual inverter with Schmitt−trigger input in tiny footprint packages. The device is designed to operate for VCC = 0.9 V to 3.6 V. Features • Designed for 0.9 V to 3.6 V VCC Operation • 3.0 ns tPD at 3.3 V (Typ) • Inputs/Outputs Over−Voltage Tolerant up to 3.6 V • IOFF Supp

文件：173.64 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

丝印：P14；Package：DFN2020-6D；20V P-Channel Enhancement-Mode MOSFET

文件：729.6 Kbytes 页数：5 Pages

LRC

乐山无线电

丝印：P14；Package：MAA05A；TinyLogic ULP Inverter with Schmitt Trigger Input

文件：390.89 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

丝印：P14；Package：MAA06A；TinyLogic ULP Dual Inverter

文件：289.44 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

丝印：P14；Package：SOD-123；SURFACE MOUNTSCHOTTKY RECTIFIERS

文件：430.08 Kbytes 页数：3 Pages

YFWDIODE

佑风微电子

丝印：P14N65FJD；Package：TO-220FJD-3L；14A, 650V SUPER JUNCTION MOS POWER TRANSISTOR

DESCRIPTION SVSP14N65FJD/T/KD2 is an N-channel enhancement mode high voltage power MOSFETs produced using Silan’s DPMOS technology. It achieves low conduction loss and switching losses. It leads the design engineers to their power converters with high efficiency, high power density, and super

文件：308.02 Kbytes 页数：9 Pages

SILAN

士兰微

丝印：P14N65FJD；Package：TO-220FJD-3L；14A, 650V SUPER JUNCTION MOS POWER TRANSISTOR

DESCRIPTION SVSP14N65FJD/T/KD2 is an N-channel enhancement mode high voltage power MOSFETs produced using Silan’s DPMOS technology. It achieves low conduction loss and switching losses. It leads the design engineers to their power converters with high efficiency, high power density, and super

文件：308.02 Kbytes 页数：9 Pages

SILAN

士兰微