MSC8113数据手册恩XP中文资料规格书

描述 Description

Overview Archived content is no longer updated and is made available for historical reference only.
The MSC8113 is a highly integrated system-on-chip (SoC) that combines three StarCore® SC140 extended cores with a RS-232 serial interface, four time division multiplexed (TDM) serial interfaces, 32 general-purpose timers, a flexible system interface unit (SIU), an Ethernet interface and a multi-channel DMA controller. The three extended cores can deliver a total 3600/4800 DSP MMACS performance at 300/400 MHz.
Each core has four arithmetic logic units (ALUs), internal memory, a write buffer and two interrupt controllers. The MSC8113 targets high-bandwidth highly computational DSP applications and is optimized for wireless transcoding and packet telephony as well as high-bandwidth base station applications. The MSC8113 delivers enhanced performance while maintaining low-power dissipation and greatly reduces system cost.
The MSC8113 device is designed to provide an optimal solution for 3G wireless base stations to help eliminate many of the costly and power-hungry ASICs and FPGAs required in today's systems for both symbol rate and for chip rate assist. In addition, the MSC8113 allows you to add next-generation features that efficiently use available frequencies and higher bit rates in 3G systems.
Efficient application software development is key in Our strategy to expedite your time-to-market. Developers have access to development tools and real-time operating systems (RTOS) from NXP® and third-party suppliers. NXP partners with third-party vendors to provide integrated systems solutions that include GSM, CDMA, TDMA, and ITU G.7xx speech coders, hybrid echo cancellation, fax, modem and xDSL software.

特性 Features

Three 300/400 MHz StarCore® SC140 DSP extended cores


•12 ALUs on a chip deliver up to 3600/4800 MMACS

•Performance equivalent to a 0.9/1.2 GHz SC140 core



•Large on-chip SRAM memory


•1196 KB of internal SRAM

•Efficient multi-level memory hierarchy




•External bus configurable as:
•32-bit data system bus/64-bit direct slave interface (DSI)

•64-bit data system bus/32-bit DSI

•Ethernet (MII/RMII)/32-bit system bus/32-bit DSI




•Four independent TDM interfaces


•256 channels total for connectivity to T1/E1, MVIP and H.110 interfaces

•Up to 62.5 Mbps per TDM interface




•Flexible memory controller accesses various external memories, including SDRAMs, SRAMs, SSRAMs, EPROMs and flash

•Internal DMA controller that supports 16 time-multiplexed unidirectional channels, enabling data transfers of to and from the SC140 core M1 memory, M2 memory and serial interfaces

•Ethernet interface designed to comply with IEEE® Std. 802.3, 802.3u, 802.3x, and 802.3ac:

•Gives direct access to internal memories via the DMA controller

•Supports 10/100 Mbps and 10 Mbps media-independent interfaces (MIIs), 10/100 Mbps reduced media-independent interface (RMII), and 10/100 Mbps serial media-independent interface (SMII)


The MSC8113 device is manufactured in 90 nm process technology. The devices use a 20 mm x 20 mm flip chip ball-grid array (FC-BGA) package, available with lead-free or lead-bearing spheres.

Availability

Contact your local sales office for information about availability.