MPC961P中文资料瑞萨数据手册PDF规格书

The MPC961 is a 2.5 V or 3.3 V compatible, 1:18 PLL based zero delay buffer.

With output frequencies of up to 200 MHz, output skews of 150 ps the device

meets the needs of the most demanding clock tree applications.

Features

• Fully Integrated PLL

• Up to 200 MHz I/O Frequency

• LVCMOS Outputs

• Outputs Disable in High Impedance

• LVPECL Reference Clock Options

• LQFP Packaging

• 32-lead Pb-free Package Available

• 50 ps Cycle-Cycle Jitter

• 150 ps Output Skews