MPC2605中文资料Integrated Secondary Cache for PowerPC™ Microprocessors数据手册恩XP规格书

描述 Description

Overview The MPC2605 is EOL. See PCN9049. Possible replacement: none.The MPC2605 is the highest performing secondary cache solution available for applications using the MPC603e, MPC740, MPC860, and MPC8260. The MPC2605 is a four-way set associative integrated look-aside cache with copy-back or optional write-throughcapability. An increase in system performance is achieved by integrating the data, tag, host interface, and least recently used (LRU) memory with a cache controller in a single chip.These solutions offer minimum latency and zero wait state burst performance -- burst reads occur at 2-1-1-1 clockrates. The multi-way set associativity feature increases cache hit rates, which makes the cache behave like a direct-mapped cache twice its size. This yields a higher performance system solution at 256KB prices. This yields a higher performance system solution at 256KB prices.

特性 Features

•Single Chip L2 Cache
•66 or 83 MHz Zero Wait State Performance (2-1-1-1 Burst)
•Four-Way Set Associative Cache Design
•32K x 72 Data Memory Array
•8K x 18 Tag Array
•Address Parity Support
•LRU Cache Control Logic
•Copy-Back or Write-Through Modes of Operation
•Copy-Back Buffer for Improved Performance
•Single 3.3 V Power Supply
•5 V Tolerant I/O
•One-, Two-, or Four-Chip Cache Solution (256KB, 512KB, or 1MB)
•Single Clock Operation
•Compliant with IEEE Standard 1149.1 Test Access Port (JTAG)
•Supports up to Four Processors in a Shared Cache Configuration
•High Board Density 25 mm 241 PBGA Package