4-to-16 Line Decoder

General Description\nThis decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits. Typical propagation delay: 21 ns\nPower supply quiescent current: 80mA (74HC)\nWide power supply voltage range: 2± 6V\nLow input current: 1mA maximum;

TI

德州仪器

4-to-16 Line Decoder

文件：148.37 Kbytes 页数：6 Pages

NSC

国半

Dual 1-of-16 Decoder / Demultiplexer in bare die form

Description The 54HC154 is fabricated using a 2.5μm 5V CMOS process and has the same high speed performance of LSTTL combined with CMOS low power consumption. The device consists of x4 active-high binary address inputs, x16 active-low outputs & x2 active-low chip-selects. The x2 active-low

文件：1.38723 Mbytes 页数：6 Pages

SS

High Speed CMOS Logic

Features:  Output Drive Capability: 10 LSTTL Loads  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54LS154  Full Military Temperature Range.

文件：1.29958 Mbytes 页数：6 Pages

SS

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：229.49 Kbytes 页数：14 Pages

TI

德州仪器