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MC100LVEL14中文资料3.3 V ECL 1:5 时钟分发芯片数据手册ONSEMI规格书

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厂商型号

MC100LVEL14

参数属性

MC100LVEL14 封装/外壳为20-SOIC(0.295",7.50mm 宽);包装为卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带;类别为集成电路(IC)的时钟缓冲器驱动器;产品描述:IC CLK BUFFER 2:5 1GHZ 20SOIC

功能描述

3.3 V ECL 1:5 时钟分发芯片
IC CLK BUFFER 2:5 1GHZ 20SOIC

封装外壳

20-SOIC(0.295",7.50mm 宽)

制造商

ONSEMI ON Semiconductor

中文名称

安森美半导体

数据手册

原厂下载下载地址下载地址二

更新时间

2025-10-1 13:28:00

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MC100LVEL14规格书详情

描述 Description

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of -3.0 V to -3.8 V ( or 3.0 V to 3.8 V). The LVEL14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL pin will select the differential clock input. The common enable (EN) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

特性 Features

• 50 ps Output-to-Output Skew
• Synchronous Enable/Disable
• Multiplexed Clock Input
• ESD Protection: >2 KV HBM
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.8 V
• Internal Input Pulldown Resistors on CLK
• Q Output will Default LOW with Inputs Open or at VEE
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Flammability Rating: UL-94 code V-0 @ 1/8\", Oxygen Index 28 to 34
• Transistor Count = 303 devices

简介

MC100LVEL14属于集成电路(IC)的时钟缓冲器驱动器。由制造生产的MC100LVEL14时钟缓冲器,驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输,常用作频率/时间参考信号,以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲(即,为使信号不受驱动负载的影响而从某个信号源复制信号),但是该产品族中的某些器件还能执行其他功能,例如选择性改变缓冲信号路径、按某个整数值分割信号频率,或进行所用电信号格式转换。

技术参数

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  • 制造商编号

    :MC100LVEL14

  • 生产厂家

    :ONSEMI

  • Pb-free

    :Pb

  • Halide free

    :H

  • Status

    :Active

  • Type

    :Buffer

  • Channels

    :1

  • Input / Output Ratio

    :2:1:5

  • Input Level

    :ECL

  • Output Level

    :ECL

  • VCC Typ (V)

    :3.3

  • tJitterRMS Typ (ps)

    :0.2

  • tskew(o-o) Max (ps)

    :50

  • tpd Typ (ns)

    :0.68

  • tR & tF Max (ps)

    :500

  • fmaxClock Typ (MHz)

    :1000

  • Package Type

    :SOIC-20W

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