MC100LVE111中文资料3.3 V ECL 1:9 Differential Clock Driver数据手册ONSEMI规格书

描述 Description

The MC100LVE111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The MC100LVE111's function and performance are similar to the popular MC100E111, with the added feature of low voltage operation. It accepts one signal input, which can be either differential or single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. The LVE111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within a device, and empirical modeling is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50 W, even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20 ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. The MC100LVE111, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the LVE111 to be used for high performance clock distribution in +3.3 V systems. Designers can take advantage of the LVE111's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For systems incorporating GTL, parallel termination offers the lowest power

特性 Features

• 200ps Part-to-Part Skew.
• 50ps Output-to-Output Skew
• ESD Protection: >2 KV HBM, >200 V MM
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -3.8 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or at VEE
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8\", Oxygen Index 28 to 34
• Transistor Count = 250 devices
• Pb-Free Packages are Available

简介

MC100LVE111属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的MC100LVE111时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。