MB85RS64TPNF-G-JNE2中文资料富士通数据手册PDF规格书

DESCRIPTION

MB85RS64T is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words 

bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile

memory cells.

MB85RS64T adopts the Serial Peripheral Interface (SPI).

The MB85RS64T is able to retain data without using a back-up battery, as is needed for SRAM.

The memory cells used in the MB85RS64T can be used for 1013 read/write operations, which is a significant

improvement over the number of read and write operations supported by Flash memory and E2PROM.

MB85RS64T does not take long time to write data like Flash memories or E2PROM, and MB85RS64T takes

no wait time.

FEATURES

Bit configuration : 8,192 words  8 bits

Serial Peripheral Interface : SPI (Serial Peripheral Interface)

Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1)

Operating frequency : 10 MHz (Max)

High endurance : 1013 times / byte

Data retention : 40.2 years (  85 C), 383 years (  55 C)

Operating power supply voltage : 1.7 V to 3.6 V

Low power consumption : Operating power supply current 0.8 mA (Max@10 MHz)

Standby current 9 A (Typ)

Operation ambient temperature range :  40 C to +85 C

Package : 8-pin plastic SOP (FPT-8P-M02)

RoHS compliant