MB85RS4MTPF-G-BCE1中文资料富士通数据手册PDF规格书

DESCRIPTION

MB85RS4MT is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 524,288

words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the

nonvolatile memory cells.

MB85RS4MT adopts the Serial Peripheral Interface (SPI).

The MB85RS4MT is able to retain data without using a back-up battery, as is needed for SRAM.

The memory cells used in the MB85RS4MT can be used for 1013 read/write operations, which is a significant

improvement over the number of read and write operations supported by Flash memory and E2PROM.

MB85RS4MT does not take long time to write data like Flash memories or E2PROM, and MB85RS4MT takes

no wait time.

FEATURES

Bit configuration : 524,288 words  8 bits

Serial Peripheral Interface : SPI (Serial Peripheral Interface)

Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1)

Operating frequency : 40MHz (Max)

High endurance : 1014 times

Data retention : 10 years (+85 C),95 years(+55 C), over 200 years(+35 C)

Operating power supply voltage : 1.8 V to 3.6 V

Low power consumption : Operating power supply current 2.6mA (Max@40 MHz)

Standby current 50 A (Max)

Sleep current 8A (Max)

Operation ambient temperature range : -40 C to +85 C

Package : 8-pin plastic SOP (208mil)

RoHS compliant