LM8330数据手册集成电路（IC）的专用规格书PDF

描述 Description

The LM8330 I/O - Expander and Keypad Controller is a dedicated device designed to unburden a host processor from scanning a matrix-addressed keypad and to provide flexible and general purpose, host programmable input/output functions. Three independent Pulse Width Modulation (PWM) timer outputs are provided for dynamic LED brightness modulation. It communicates with a host processor through an I2C-compatible ACCESS.bus serial interface. It can communicate in Standard (100 kHz) and Fast-Mode (400 kHz) in slave Mode only. All available input/output pins can alternately be used as an input or an output in a keypad matrix or as a host-programmable general-purpose input or output. Any pin programmed as an input can also sense hardware interrupts. The interrupt polarity (“high-to-low” or “low-to-high” transition) is thereby programmable. The LM8330 follows a predefined register-based set of commands. Upon startup (power-on) a configuration file must be sent from the host to set up the hardware of the device.The LM8330 is available in a 25-bump lead-free DSBGA package size 2.0 mm x 2.0 mm x 0.6 mm (0.4 mm pitch).The LM8330 has integrated ASIP (Application Specific Integrated Passives) on the KPX[7:0] and KPY[10:0] pins. These pins are designed to tolerate IEC61000-4-2 level 4 ESD: ±8 kV direct contact.

特性 Features

• KEY FEATURES
• Keypad Matrices of up to of 8 x 12 Keys, Plus 8 Special Function (SF) Keys, for a Full 104 Key Support.
• Supports General-purpose I/O Expansion on Pins Not Otherwise Used for Keypad or PWM Output.
• Keypad Matrix and Dedicated Key Support:16-Event Keycode Buffer4-Event Multiple Key Storage Registers
• Internal Oscillator, No External Clock Required.
• I2C-compatible ACCESS.bus Slave Interface Standard (100 kHz) and Fast (400 kHz) Modes:7-bit and 10-bit AddressingProgrammable Slave Address(Default 7-bit 0x88, 10-bit 0x088)
• Three Host-programmable PWM OutputsSmooth LED Brightness ModulationDedicated 31-command Script BuggerRegister-based Command Interpreter with Auto-increment Addressing
• Key Events, Errors, and Dedicated Hardware Interrupts, Request Host Service by Asserting an IRQ Output
• Ultra-Low-Power OperationAutomatic HALT Mode: 1.5 µA (typ.)Active Supply Current: 23 µA (typ.)Configurable Wake-Up from HALT Operation
• IEC61000-4-2 ESD Protection on KPX[7:0] and KPY[10:0] pins
• ESD Glitch Filter on RESETN Input
• External Reset for System Control

• HOST-CONTROLLED FEATURES
• Reset Input for System Control
• PWM Scripting for Three PWM Outputs
• Period of Inactivity That Triggers Entry into HALT Mode
• Debounce Time for Reliable Key Event Polling
• Configuration of General Purpose I/O Ports
• Various Initialization Options (Keypad Size, etc.)

• KEY DEVICE FEATURES
• 1.8V ±10% Single-supply Operation
• On-chip Power-on Reset (POR)
• −30°C to +85°C Temperature Range
• Robust IEC ESD Protection: ±8 kV Direct Contact on KPX[7:0] and KPY[10:0] Pins
• 25-pin DSBGA Package Size: 2 mm x 2 mm x 0.6 mm (0.4 mm Pitch)