IS62C1024-35Q中文资料ICSI数据手册PDF规格书

DESCRIPTION

The ICSI IS62C1024 is a low power,131,072-word by 8-bit CMOS static RAM. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.

When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable

inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS62C1024 is available in 32-pin 600mil DIP, 450mil SOP and 8*20mm TSOP-1 packages.

FEATURES

• High-speed access time: 35, 45, 55, 70 ns

• Low active power: 450 mW (typical)

• Low standby power: 500 µW (typical) CMOS standby

• Output Enable (OE) and two Chip Enable

(CE1 and CE2) inputs for ease in applications

• Fully static operation: no clock or refresh required

• TTL compatible inputs and outputs

• Single 5V (±10) power supply