512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体

512Mx8, 256Mx16 4Gb DDR3 SDRAM with On-Chip ECC

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency: 0, CL-1,CL-

文件：4.68108 Mbytes 页数：111 Pages

ISSI

矽成半导体