接口 IC 数字隔离器 Analog Devices ADM2483BRWZ

2021-1-28 10:48:00
  • 数字隔离器 Isolator RS-485 Transceiver I.C.

ADM2483BRWZ

接口 IC

制造商: Analog Devices Inc.

产品种类: 数字隔离器

RoHS: 详细信息

安装风格: SMD/SMT

封装 / 箱体: SOIC-16

系列: ADM2483

通道数量: 1 Channel

绝缘电压: 2.5 kVrms

隔离类型: Magnetic Coupling

数据速率: 500 kb/s

电源电压-最大: 5.5 V

电源电压-最小: 2.7 V

工作电源电流: 2.5 mA

最小工作温度: - 40 C

最大工作温度: + 85 C

封装: Tube

产品: Digital Isolators

电源类型: Dual

类型: RS-485 Isolated Transceiver

商标: Analog Devices

关闭: No Shutdown

开发套件: EVAL-ADM2483EBZ

双工: Half Duplex

工作电源电压: 5 V

产品类型: Digital Isolators

支持协议: RS-485

工厂包装数量: 47

子类别: Interface ICs

单位重量: 666 mg

ADM2483差分总线收发器是一个集成的、电隔离的组件,用于平衡多点总线传输线上的双向数据通信。它符合ANSI EIA/TIA-485-A和ISO 8482:1987(E)标准。ADM2483采用模拟设备的I耦合器技术,将一个3通道隔离器、一个三态差分线路驱动器和一个差分输入接收器组合成一个包。设备的逻辑侧由5 V或3 V电源供电,总线侧仅使用5 V电源。ADM2483进行了旋转限制,以减少传输线端接不当时的反射。控制的转换速率将数据速率限制在500kbps。该设备的输入阻抗为96k?,允许总线上最多256个收发器。它的驱动程序具有激活的高启用功能。驱动器差分输出和接收器差分输入在内部连接以形成差分输入/输出端口。当驱动器被禁用或当VDD1或VDD2=0 V时,这会对总线施加最小负载。还提供了使接收输出进入高阻抗状态的有源高接收机禁用特性。接收器输入具有真正的故障安全特性,确保当输入开路或短路时接收器输出电平为逻辑高。这保证了接收机输出在通信开始之前和通信结束时处于已知状态。电流限制和热关机功能可防止输出短路和总线争用情况,这些情况可能导致过度功耗。该部件在工业温度范围内完全指定,并提供16引线、宽体SOIC封装。

The ADM2483 differenTIal bus transceiver is an integrated, galvanically isolated component designed for bidirecTIonal data communicaTIon on balanced, mulTIpoint bus transmission lines. It complies with ANSI EIA/TIA-485-A and_ISO 8482: 1987(E)。 Using Analog Devices’ iCoupler technology, the ADM2483 combines a 3-channel isolator, a three-state differential line driver, and_a differential input receiver into a single package. The logic side of the device is powered with either a 5 V or 3 V supply, and_the bus side uses a 5 V supply only. The ADM2483 is slew-limited to reduce reflections with improperly terminated transmission lines. The controlled slew rate limits the data rate to 500 kbps. The device’s input impedance is 96 k?, allowing up to 256 transceivers on the bus. Its driver has an active-high enable feature. The driver differential outputs and_receiver differential inputs are connected internally to form a differential I/O port. When the driver is disabled or when VDD1 or VDD2 = 0 V, this imposes minimal loading on the bus. An active-high receiver disable feature, which causes the receive output to enter a high impedance state, is provided as well. The receiver inputs have a true fail-safe feature that ensures a logic-high receiver output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and_at the point when communication ends. Current limiting and_thermal shutdown features protect against output short circuits and_bus contention situations that might cause excessive power dissipation. The part is fully specified over the industrial temperature range and_is available in a 16-lead, wide body SOIC package.

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