深圳市光华微科技有限公司秦先生16620984118
AD9629-20/AD9629-40AD9629-65AD9629-80
MinTypMaxMinTypMaxMinTypMaxUnit
CLOCKINPUTPARAMETERS
InputClockRate1Full80/160260320MHz
ConversionRate2Full320/40365380MSPS
CLKPeriod，Divide-by-1Mode(tCLK)Full50/2515.3812.5ns
CLKPulseWidthHigh(tCH)25.0/12.57.696.25ns
ApertureDelay(tA)Full1.01.01.0ns
ApertureUncertainty(Jitter，tJ)Full0.10.10.1psrms
DATAOUTPUTPARAMETERS
DataPropagationDelay(tPD)Full333ns
DCOPropagationDelay(tDCO)Full333ns
DCOtoDataSkew(tSKEW)Full0.10.10.1ns
PipelineDelay(Latency)Full888Cycles
Wake-UpTime3Full350350350μs
StandbyFull600/400300260ns
OUT-OF-RANGERECOVERYTIMEFull222Cycles
InSPImode，theAD9629canbeplacedinpower-downmode
directlyviatheSPIport，orbyusingtheprogrammableexternal
MODEpin.Innon-SPImode，power-downisachievedby
assertingthePDWNpinhigh.Inthisstate，theADCtypically
dissipates500μW.Duringpower-down，theoutputdriversare
placedinahighimpedancestate.AssertingPDWNlow(orthe
MODEpininSPImode)returnstheAD9629toitsnormal
operatingmode.NotethatPDWNisreferencedtothedigital
outputdriversupply(DRVDD)andshouldnotexceedthat
supplyvoltage.
Lowpowerdissipationinpower-downmodeisachievedby
shuttingdownthereference，referencebuffer，biasingnetworks，
andclock.Internalcapacitorsaredischargedwhenenteringpower-
downmodeandthenmustberechargedwhenreturningtonormal
operation.Asaresult，wake-uptimeisrelatedtothetimespent
inpower-downmode，andshorterpower-downcyclesresultin
proportionallyshorterwake-uptimes.
WhenusingtheSPIportinterface，theusercanplacetheADC
inpower-downmodeorstandbymode.Standbymodeallows
theusertokeeptheinternalreferencecircuitrypoweredwhen
fasterwake-uptimesarerequired.SeetheMemoryMapsection
formoredetails.
DIGITALOUTPUTS
TheAD9629outputdriverscanbeconfiguredtointerfacewith
1.8Vto3.3VCMOSlogicfamilies.Outputdatacanalsobe
multiplexedontoasingleoutputbustoreducethetotalnumber
oftracesrequired.
TheCMOSoutputdriversaresizedtoprovidesufficientoutput
currenttodriveawidevarietyoflogicfamilies.However，large
drivecurrentstendtocausecurrentglitchesonthesuppliesand
mayaffectconverterperformance.
ApplicationsrequiringtheADCtodrivelargecapacitiveloads
orlargefanoutsmayrequireexternalbuffersorlatches.
Theoutputdataformatcanbesel101;ctedtobeeitheroffsetbinary
ortwoscomplementbysettingtheSCLK/DFSpinwhenoperating
intheexternalpinmode(seeTable11).
AsdetailedintheAN-877ApplicationNote，InterfacingtoHigh
SpeedADCsviaSPI，thedataformatcanbesel101;ctedforoffset
binary，twoscomplement，orgraycodewhenusingtheSPIcontrol.
Table11.SCLK/DFSandSDIO/PDWNModesel101;ction
(ExternalPinMode)
VoltageatPinSCLK/DFSSDIO/PDWN
AGNDOffsetbinary(default)Normaloperation
(default)
DRVDDTwoscomplementOutputsdisabled
DigitalOutputEnableFunction(OEB)
WhenusingtheSPIinterface，thedataoutputsandDCOcanbe
independentlythree-statedbyusingtheprogrammableexternal
MODEpin.TheMODEpin(OEB)functionisenabledvia
Bits091;6:5093;ofRegister0x08.
IftheMODEpinisconfiguredtooperateintraditionalOEB
modeandtheOEBpinislow，theoutputdatadriversand
DCOsareenabled.IftheOEBpinishigh，theoutputdata
driversandDCOsareplacedinahighimpedancestate.This
OEBfunctionisnotintendedforrapidaccesstothedatabus.
NotethatOEBisreferencedtothedigitaloutputdriversupply
(DRVDD)andshouldnotexceedthatsupplyvoltage.
TIMING
TheAD9629provideslatcheddatawithapipelinedelayof
9clockcycles.Dataoutputsareavailableonepropagation
delay(tPD)aftertherisingedgeoftheclocksignal.
Minimizethelengthoftheoutputdatalinesandloadsplaced
onthemtoreducetransientswithintheAD9629.These
transientscandegradeconverterdynamicperformance.
ThelowesttypicalconversionrateoftheAD9629is3MSPS.At
clockratesbelow3MSPS，dynamicperformancecandegrade.
DataClockOutput(DCO)
TheAD9629providesadataclockoutput(DCO)signal
intendedforcapturingthedatainanexternalregister.TheCMOS
dataoutputsarevalidontherisingedgeofDCO，unlesstheDCO
clockpolarityhasbeenchangedviatheSPI.SeeFigure2fora
graphicaltimingde115;cription.
Table12.OutputDataFormat
Input(V)Condition(V)OffsetBinaryOutputModeTwosComplementModeOR
VIN+?VIN??VREF?0.5LSB0000000000001000000000001
VIN+?VIN??VREF0000000000001000000000000
VIN+?VIN?01000000000000000000000000
VIN+?VIN?+VREF?1.0LSB1111111111110111111111110
VIN+?VIN?+VREF?0.5LSB111111111111011111
