Features ■ Operating conditions – Operating power supply range 1.8 V to 3.6 V (down to 1.65 V at power down) – Temperature range: - 40 °C to 85 or 125 °C ■ Low power features – 5 low power modes: Wait , Low power run (5.4 µA), Low power wait (3 µA), Active-halt with RTC (1 µA), Halt (400 nA) – Dynamic consumption: 192 µA/MHz – Ultralow leakage per I/0: 50 nA – Fast wakeup from Halt: 5 µs ■ Advanced STM8 core – Harvard architecture and 3-stage pipeline – Max freq. 16 MHz, 16 CISC MIPS peak – Up to 40 external interrupt sources ■ Reset and supply management – Low power, ultrasafe BOR reset with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) ■ Clock management – 1 to 16 MHz crystal oscillator – 32 kHz crystal oscillator – Internal 16 MHz factory-trimmed RC – Internal 38 kHz low consumption RC – Clock security system ■ Low power RTC – BCD calendar with alarm interrupt – Auto-wakeup from Halt w/ periodic interrupt ■ LCD:up to 4x28 segments w/ step-up converter ■ Memories – Up to 32 KB of Flash program memory and 1 Kbyte of data EEPROM with ECC, RWW – Flexible write and read protection modes – Up to 2 Kbytes of RAM ■ DMA – 4 channels; supported peripherals: ADC, DAC, SPI, I2C, USART, timers – 1 channel for memory-to-memory ■ 12-bit DAC with output buffer
■ 12-bit ADC up to 1 Msps/25 channels – T. sensor and internal reference voltage ■ 2 Ultralow power comparators – 1 with fixed threshold and 1 rail to rail – Wakeup capability ■ Timers – Two 16-bit timers with 2 channels (used as IC, OC, PWM), quadrature encoder – One 16-bit advanced control timer with 3 channels, supporting motor control – One 8-bit timer with 7-bit prescaler – 2 watchdogs: 1 Window, 1 Independent – Beeper timer with 1, 2 or 4 kHz frequencies ■ Communication interfaces – Synchronous serial interface (SPI) – Fast I2C 400 kHz SMBus and PMBus – USART (ISO 7816 interface and IrDA) ■ Up to 41 I/Os, all mappable on interrupt vectors ■ Up to 16 capacitive sensing channels with free firmware ■ Development support – Fast on-chip programming and non intrusive debugging with SWIM – Bootloader using USART ■ 96-bit unique ID
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