品牌：TI
批号：17+
数量:10000
封装:VQFN48
价格:面议
说明：全新原装现货，可出样品
IC特征：1FEATURES
• Dual 1:8 Differential Buffer DESCRIPTION
• Low Additive Jitter <300 fs RMS in The CDCLVD2108 clock buffer distributes two clock
10 kHz to 20 MHz inputs (IN0, IN1) to a total of 16 pairs of differential
LVDS clock outputs (OUT0, OUT15). Each buffer • Low Within Bank Output Skew of 50 ps (Max) block consists of one input and 8 LVDS outputs. The
• Universal Inputs Accept LVDS, LVPECL, inputs can either be LVDS, LVPECL, or LVCMOS.
LVCMOS
The CDCLVD2108 is specifically designed for driving
• One Input Dedicated for Eight Outputs 50-Ω transmission lines. In case of driving the inputs
• Total of 16 LVDS Outputs, ANSI EIA/TIA-644A in single ended mode, the appropriate bias voltage
Standard Compatible (VAC_REF) should be applied to the unused negative
input pin. • Clock Frequency up to 800 MHz
• 2.375–2.625V Device Power Supply Using the control pin (EN) outputs can be either
disabled or enabled. If the EN pin is left open all • LVDS Reference Voltage, VAC_REF, Available for
outputs are active, if switched to a logical '0' all Capacitive Coupled Inputs outputs are disabled (static logical 0), if switched to a
• Industrial Temperature Range –40°C to 85°C logical '1', OUT (8..15) are switched off and OUT
• Packaged in 7mm × 7mm 48-Pin QFN (RGZ) (0..7) are active. The part supports a fail safe
function. It incorporates an input hysteresis, which • ESD Protection Exceeds 3 kV HBM, 1 kV CDM
prevents random oscillation of the outputs in absence
of an input signal. APPLICATIONS
• Telecommunications/Networking The device operates in 2.5V supply environment and
is characterized from –40°C to 85°C (ambient • Medical Imaging temperature). The CDCLVD2108 is packaged in
• Test and Measurement Equipment small 48-pin, 7-mm x 7-mm QFN package.
• Wireless Communications
• General Purpose Clocking
联系人:程小姐
手机:15919480276
电话:0755- 21015360 & 23038182
传真:0755-23038182
地址:深圳市福田区振华路海外装饰大厦综合大楼2栋B段4楼4014B-33C
