BiCMOS SyncBiFIFOO 64 x 36 x 2

DESCRIPTION The IDT723612 is a monolithic high-speed, low-power CMOS bi-directional clocked FIFO memory. It supports clock frequencies up to 67 MHz and has read access times as fast as 10ns. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip buffer data in opposite directions. FEATUR

文件：350.41 Kbytes 页数：29 Pages

IDT

Package：132-BQFP 缓冲式；包装：卷带（TR） 功能：同步 类别：集成电路（IC） FIFO 存储器 描述：IC FIFO 64X36X2 20NS 132QFP

RENESAS

瑞萨

Package：132-BQFP 缓冲式；包装：卷带（TR） 功能：同步 类别：集成电路（IC） FIFO 存储器 描述：IC FIFO 64X36X2 20NS 132QFP

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

文件：611.36 Kbytes 页数：26 Pages

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

文件：611.36 Kbytes 页数：26 Pages

RENESAS

瑞萨

BiCMOS SyncBiFIFOO 64 x 36 x 2

DESCRIPTION The IDT723612 is a monolithic high-speed, low-power CMOS bi-directional clocked FIFO memory. It supports clock frequencies up to 67 MHz and has read access times as fast as 10ns. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip buffer data in opposite directions. FEATUR

文件：350.41 Kbytes 页数：29 Pages

IDT