FEATURES

• Nine single ended LVCMOS/LVTTL outputs;

(8) clocks, (1) feedback

• PCLK, nPCLK pair can accept the following differential

input levels: LVPECL, CML, SSTL

• Maximum output frequency: PLL Mode, 175MHz

• VCO range: 250MHz to 700MHz

• Output skew: 75ps (maximum)

• Cycle-to-cycle jitter: 50ps (maximum)

• Static phase offset: 90ps ± 110ps

• 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages