ICS859S0212I中文资料瑞萨数据手册PDF规格书

Features

• High speed 2:1 differential multiplexer with a 1:2 fanout buffer

• Two differential LVPECL or LVDS output pairs

• Two selectable differential PCLKx, nPCLKx input pairs

• PCLKx, nPCLKx pairs can accept the following differential

input levels: LVPECL, LVDS, CML

• Maximum output frequency: 3GHz

• Translates any single ended input signal to LVPECL levels with

resistor bias on nPCLKx input

• Part-to-part skew: 100ps (maximum)

• Propagation delay: 565ps (typical) at 3.3V

• Additive phase jitter, RMS: 0.21ps (typical) at 3.3V

• Full 3.3V or 2.5V supply modes

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package