ICS858012AKLF中文资料ICST数据手册PDF规格书

GENERAL DESCRIPTION

The ICS858012 is a high speed 1-to-2 Differentialto-2.5V, 3.3V LVPECL Fanout Buffer and is a member of the HiPerClockS™ family of high performance clock solutions from ICS. The ICS858012 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, LVHSTL and HCSL to be easily interfaced to the input with minimal use of external components. The ICS858012 is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.

FEATURES

• Two differential LVPECL outputs

• One differential LVPECL clock input

• IN, nIN pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

• Output frequency: 2GHz (typical)

• Output skew: <15ps (typical)

• Part-to-part skew: TBD

• Additive phase jitter, RMS: TBD

• Propagation delay: 350ps (typical)

• Operating voltage supply range: VCC = 2.375V to 3.63V, VEE = 0V

• -40°C to 85°C ambient operating temperature

• Availabe in both standard and lead-free RoHS compliant packages