LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

GENERAL DESCRIPTION The ICS8344I is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8344I has two selectable clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. T

文件：142.81 Kbytes 页数：16 Pages

ICST

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

GENERAL DESCRIPTION The ICS8344I is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8344I has two selectable clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. T

文件：142.81 Kbytes 页数：16 Pages

ICST

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Renesas

瑞萨

丝印：ICS8344BYILF；Package：LQFP；Low Skew, 1-to-24 Differential-to- LVCMOS/LVTTL Fanout Buffer

FEATURES • Twenty-four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Two selectable differential clock input pairs for redundant clock applications • CLKx, nCLKx pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 100MH

文件：361.9 Kbytes 页数：17 Pages

RENESAS

瑞萨

丝印：ICS8344BYILF；Package：LQFP；Low Skew, 1-to-24 Differential-to- LVCMOS/LVTTL Fanout Buffer

FEATURES • Twenty-four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Two selectable differential clock input pairs for redundant clock applications • CLKx, nCLKx pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 100MH

文件：361.9 Kbytes 页数：17 Pages

RENESAS

瑞萨