HN58C256AFP-85数据手册HITACHI中文资料规格书

描述 Description

The Hitachi HN58C256A and HN58C257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster.

特性 Features

• Single 5 V supply: 5 V ±10%
• Access time: 85 ns/100 ns (max)
• Power dissipation
 - Active: 20 mW/MHz, (typ)
 - Standby: 110 µW (max)
• On-chip latches: address, data, CE, OE, WE
• Automatic byte write: 10 ms max
• Automatic page write (64 bytes): 10 ms max
• Ready/Busy (only the HN58C257A series)
• Data polling and Toggle bit
• Data protection circuit on power on/off
• Conforms to JEDEC byte-wide standard
• Reliable CMOS with MNOS cell technology
• 105 erase/write cycles (in page mode)
• 10 years data retention
• Software data protection
• Write protection by RES pin (only the HN58C257A series)
• Industrial versions (Temperatur range: – 20 to 85˚C and – 40 to 85˚C) are also available.