4 M SRAM (512-kword x 8-bit)

Description\nThe Hitachi HM628512A is a 4-Mbit static RAM organized 512-kword ×8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 60 •  Single 5 V supply\n•  Access time: 55/70 ns (max)\n•  Power dissipation\n Active: 50 mW/MHz (typ)\n Standby: 10 µW (typ)\n•  Completely static memory. No clock or timing strobe required\n•  Equal access and cycle times\n•  Common data input and output: Three state output\n•  Directly TTL compat;

HITACHI

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