Triple 3-input AND gate

DESCRIPTION The HEF4073B provides the positive triple 3-input AND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

文件：24.75 Kbytes 页数：3 Pages

PHI

飞利浦

Triple 3-input AND gate

DESCRIPTION\nThe HEF4073B provides the positive triple 3-input AND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

恩XP

Triple 3-input AND gate

DESCRIPTION The HEF4073B provides the positive triple 3-input AND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

文件：24.75 Kbytes 页数：3 Pages

PHI

飞利浦

Triple 3-input AND gate

1 General description The HEF4073B is a triple 3-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused i

文件：161.96 Kbytes 页数：11 Pages

NEXPERIA

安世

4A single-cell lithium iron phosphate battery charge management integrated circuit

文件：573.88 Kbytes 页数：11 Pages

HMSEMI

华之美半导体