HD74LVC74TELL规格书批发采购瑞萨RENESAS-114ic电子网

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零件编号	下载&订购	功能描述	制造商&上传企业
HD74LVC74TELL	文件：189.04 Kbytes Page：7 Pages	Dual D-type Flip Flops with Preset and Clear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac	RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司
74LVC74A	文件：99.08 Kbytes Page：10 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc	PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦
74LVC74A	文件：111.03 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati	nxpNXP Semiconductors 恩智浦恩智浦半导体公司
74LVC74A	文件：266.16 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司
74LVC74ABQ	文件：266.16 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司
74LVC74ABQ	文件：111.03 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati	nxpNXP Semiconductors 恩智浦恩智浦半导体公司
74LVC74AD	文件：111.03 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati	nxpNXP Semiconductors 恩智浦恩智浦半导体公司
74LVC74AD	文件：99.08 Kbytes Page：10 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc	PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦
74LVC74AD	文件：266.16 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司
74LVC74ADB	文件：99.08 Kbytes Page：10 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc	PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦
74LVC74ADB	文件：111.03 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati	nxpNXP Semiconductors 恩智浦恩智浦半导体公司
74LVC74APW	文件：99.08 Kbytes Page：10 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc	PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦
74LVC74APW	文件：111.03 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati	nxpNXP Semiconductors 恩智浦恩智浦半导体公司
74LVC74APW	文件：266.16 Kbytes Page：16 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司
74LVC74APWDH	文件：99.08 Kbytes Page：10 Pages	DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc	PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦
HD74LVC74	文件：48.32 Kbytes Page：9 Pages	DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac	HitachiHitachi, Ltd. 日立公司
HD74LVC74	文件：189.04 Kbytes Page：7 Pages	DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac	RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司
HD74LVC74FPEL	文件：189.04 Kbytes Page：7 Pages	DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac	RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司
RD74LVC74B	文件：112.67 Kbytes Page：9 Pages	DualD-typeFlipFlopswithPresetandClear	RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司
RD74LVC74BFPEL	文件：112.67 Kbytes Page：9 Pages	DualD-typeFlipFlopswithPresetandClear	RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司

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型号：
HD74LVC74TELL
制造商：
Renesas Electronics Corporation

供应商	型号	品牌	批号	封装	库存	备注	价格
深圳市毅创腾电子科技有限公司	HD74LVC74TELL	HIT	23+	TSSOP	7000	绝对全新原装!100%保质量特价!请放心订购!	询价
深圳市勤思达科技有限公司	HD74LVC74TELL	HIT	23+	TSSOP	8000	全新原装,现货热卖	询价
深圳好佳好科技有限公司	HD74LVC74TELL	RENESAS	1305+	原装假一赔十	12000	公司特价原装现货	询价
深圳市佳鑫美电子科技有限公司	HD74LVC74TELL		22+	TSSOP	3200	绝对原装自家现货!真实库存!欢迎来电!	询价
深圳市莱克讯科技有限公司	HD74LVC74TELL	RENESAS	2017+	TSSOP14D	32256	深圳香港代理原装现货库存(美国-日本-台湾)可开正规增	询价
深圳市特顺芯科技有限公司	HD74LVC74TELL	HIT	98P4	TSSOP	1838		询价
上海鑫科润电子科技有限公司	HD74LVC74TELL	HIT	98P4	TSSOP	1838	原装现货海量库存欢迎咨询	询价
千层芯半导体(深圳)有限公司	HD74LVC74TELL	HITACHI	2018+	TSSOP14	30617	HITACHI品牌专营全新原装热卖	询价
深圳市科恒伟业电子有限公司	HD74LVC74TELL	HIT	1844+	TSSOP14	6528	只做原装正品假一赔十为客户做到零风险!!	询价
深圳市百视威讯电子科技有限公司	HD74LVC74TELL		23+	N/A	36300	正品授权货源可靠	询价

更多HD74LVC74TELL供应商更新时间2024-4-27 16:30:00

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