Octal D Flip-Flop

Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features • Ideal Buffer for MOS Microprocessor or Memory • Eight Edge-T

文件：60.27 Kbytes 页数：10 Pages

HITACHIHitachi Semiconductor

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Octal D-Type Flip-Flop

Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features • Ideal Buffer for MOS Microprocessor or Memory • Eight Edge-T

文件：118.43 Kbytes 页数：8 Pages

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Standard IC>General-Purpose Logics>HD74AC Series

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Octal D-Type Flip-Flop

Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features • Ideal Buffer for MOS Microprocessor or Memory • Eight Edge-T

文件：118.43 Kbytes 页数：8 Pages

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瑞萨

Octal D-Type Flip-Flop

Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features • Ideal Buffer for MOS Microprocessor or Memory • Eight Edge-T

文件：118.43 Kbytes 页数：8 Pages

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瑞萨

Octal D-Type Flip-Flop

Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features • Ideal Buffer for MOS Microprocessor or Memory • Eight Edge-T

文件：118.43 Kbytes 页数：8 Pages

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瑞萨