Dual D-Type Positive Edge-Triggered Flip-Flop

Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir

文件：121.33 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual D-Type Positive Edge-Triggered Flip-Flop

Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir

文件：121.33 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC74 is identical in pinout to the LS/ALS74, HC/HCT74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. This device consists of two D flip

文件：165.59 Kbytes 页数：5 Pages

INTEGRAL

Integral Corp.

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC74 is identical in pinout to the LS/ALS74, HC/HCT74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. This device consists of two D flip

文件：225.51 Kbytes 页数：6 Pages

IKSEMICON