4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER

DESCRIPTION The HCC4035B (extended temperature range) and HCF4035B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. ■ 4-STAGE CLOCKED SHIFT OPERATION ■ SYNCHRONOUSPARALLEL ENTRY ON ALL 4

文件：296.29 Kbytes 页数：14 Pages

STMICROELECTRONICS

意法半导体

4 STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER

DESCRIPTION The HCF4035B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. This device is a four stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first

文件：1.93012 Mbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

4-bit universal shift register

DESCRIPTION The HEF4035B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

文件：98.07 Kbytes 页数：8 Pages

PHI

PHI

4-bit universal shift register

DESCRIPTION The HEF4035B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

文件：98.07 Kbytes 页数：8 Pages

PHI

PHI

4-bit universal shift register

DESCRIPTION The HEF4035B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions

文件：98.07 Kbytes 页数：8 Pages

PHI

PHI