17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock

General Description\nThe GTLP16617 is a 17-bit registered synchronous bus transceiver that provides TTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB. The device provides a hig ■ Bidirectional interface between GTLP and TTL logic levels\n■ Designed with edge rate control circuitry to reduce output noise on the GTLP port\n■ VREF pin provides external supply reference voltage for receiver threshold adjustibility\n■ Special PVT compensation circuitry to provide consistent per;

ONSEMI

安森美半导体

17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock

General Description The GTLP16617 is a 17-bit registered synchronous bus transceiver that provides TTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB. The device provides a h

文件：74.25 Kbytes 页数：10 Pages

FAIRCHILD

仙童半导体

Package：56-BSSOP（0.295"，7.50mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.45V 56SSOP

ONSEMI

安森美半导体

17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock

General Description The GTLP16617 is a 17-bit registered synchronous bus transceiver that provides TTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB. The device provides a h

文件：74.25 Kbytes 页数：10 Pages

FAIRCHILD

仙童半导体

SEMICONDUCTORS

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T1/CEPT Transformers

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