丝印：GTL；Package：SOT26；SINGLE CHIP SOLUTION FOR 1-CELL Li BATTERY PACK

文件：742.23 Kbytes 页数：18 Pages

DIODES

美台半导体

丝印：GTL16612；Package：TSSOP；18-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS

FEATURES · Members of Texas Instruments Widebus™ Family · UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Translate B

文件：584.91 Kbytes 页数：17 Pages

TI

德州仪器

丝印：GTL16612；Package：TSSOP；18-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS

FEATURES · Members of Texas Instruments Widebus™ Family · UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Translate B

文件：584.91 Kbytes 页数：17 Pages

TI

德州仪器

丝印：GTL16612；Package：SSOP；18-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS

FEATURES · Members of Texas Instruments Widebus™ Family · UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Translate B

文件：584.91 Kbytes 页数：17 Pages

TI

德州仪器

丝印：GTL16612；Package：SSOP；18-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS

FEATURES · Members of Texas Instruments Widebus™ Family · UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Translate B

文件：584.91 Kbytes 页数：17 Pages

TI

德州仪器

丝印：GTL16616；Package：SSOP；17-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · GTL Buff

文件：762.64 Kbytes 页数：15 Pages

TI

德州仪器

丝印：GTL16616；Package：SSOP；17-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · GTL Buff

文件：762.64 Kbytes 页数：15 Pages

TI

德州仪器

丝印：GTL16622A；Package：TSSOP；18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVER

FEATURES · Member of Texas Instruments Widebus™ Family · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · D-Type Flip-Flops With Qualified Storage Enable · Translates Between GTL/GTL+ Signal Levels and LVTTL Logic Levels · Supports Mixed-Mode (3.3 V and

文件：517.74 Kbytes 页数：13 Pages

TI

德州仪器

丝印：GTL16622A；Package：TSSOP；18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVER

FEATURES · Member of Texas Instruments Widebus™ Family · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · D-Type Flip-Flops With Qualified Storage Enable · Translates Between GTL/GTL+ Signal Levels and LVTTL Logic Levels · Supports Mixed-Mode (3.3 V and

文件：517.74 Kbytes 页数：13 Pages

TI

德州仪器

丝印：GTLP1394；Package：SOIC；2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY

FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · Split LVTTL Port Provides a Feedback Path for Control

文件：477.95 Kbytes 页数：24 Pages

TI

德州仪器