GPLB31A中文资料LCD Controller数据手册Generalplus规格书

描述 Description

The GPLB31A, an 8-bit CMOS microprocessor, contains 4288 bytes working RAM, 256K bytes ROM, 14 I/Os, interrupt/wakeup controller, UART for serial communication, Serial SRAM interface and Bus memory interface for memory expansion, and automatic display controller/driver for LCD. It also features one PWM driver with two audio channels to produce attractive sound effects easily. Its large ROM area can be used to store both program and audio data (speech duration is approx. 69 seconds at a 7KHz sampling rate using a 4-bit ADPCM). The built-in UART speeds up data transmission between two devices. Furthermore, a SLEEP (power-down) function is also built in to extend power life. The GPLB31A is designed with state-of-the-art technology to fulfill LCD application needs, especially for hand-held products.

特性 Features

• Built-in 8-bit processor
• 4288 bytes SRAM
• 256K bytes ROM
• Max. operating speed: 4.0MHz @ 2.4V - 3.6V 5.0MHz @ 3.6V - 5.5V
• CPU clock is software programmable, can be /1, /2, /4, /8, /16, /32, /64 R-oscillator clock frequency
• Provides 6 wake-up sources
• Provides 7 interrupt sources

• Asynchronous serial interface (UART)
• Serial SRAM interface
• Bus memory interface
• Built-in voltage regulator for external memory devices
• Key scan function
• SEG[15:0] can be used to send key scan output

• Programmable LCD driver
• Up to 74 segments, up to 32 commons, maximum 2368 dots
• 1/5, 1/6 bias; 1/32 duty capability
• 296 bytes dedicated LCD RAM
• Built-in voltage regulator to generate VLCD for LCD driver
• 32-level contrast control

• Power saving SLEEP mode
• Low voltage detector
• 8-level 2.9V - 2.2V/4.35V - 3.3V detection
• 2.2V Low voltage reset

• Wide operating voltage range:
• 2.4V - 3.6V
• 3.6V - 5.5V

• Peripherals
• Max. 29 I/O pins (PA[7:0], PB[7:0], PC[7:0], PD[4:0])
• Dedicated I/Os: PA[2:0]
• Shared pin I/Os: PA[3:7]/SEG[73:69] PB[7:0]/BMI AD Bus [7:0] PC[1:0]/BMI MC[1:0]/SSRAM SDA, SCK PC[3:2]/UART Rx/Tx PC[4:7]/SEG[68:65] PD[0:4]/COM[31:27]

• 32.768KHz oscillator circuit for RTC
• RC-oscillator (only one resistor is needed)
• Two 16-bit reloadable timer/counters
• 8-bit DAC resolution, 2-channel PWM audio outputs
• Watchdog Timer for reliable operation

• Low-power consumption:
• 600μA typical @ 3.0V, FCPU = 1.0MHz, FOSC = 4.0MHz
• 25μA typical halt current @ 3.0V
• <1μA typical standby current @ 3.0V