GPLB301A(OTP)数据手册Generalplus中文资料规格书

描述 Description

The GPLB301A, an 8-bit CMOS microprocessor, contains 4288 bytes working RAM, 512K bytes OTP memory, 30 I/Os, interrupt/wakeup controller, UART for serial communication, Serial SRAM interface and Bus memory interface for memory expansion, and automatic display controller/driver for LCD. It is an OTP (one-time-programming) version for GPLB30/ GPLB32 /GPLB33 /GPLB37 /GPLB38B. The embedded OTP memory enables users to customize application programs fast and conveniently. Users may use GPLB301A for prototyping and then use GPLB30/ GPLB32/ GPLB33/ GPLB37/ GPLB38B for mass production. The pin sequence of GPLB301A is compatible with GPLB32 and GPLB37. It also features one PWM driver with two audio channels to produce attractive sound effects easily. Its large OTP area can be used to store both program and audio data (speech duration approx. 138 seconds at 7KHz sampling rate using a 4-bit ADPCM). The built-in UART speeds up data transmission between two devices. Furthermore, a SLEEP (power-down) function is also built in to extend power life. The GPLB301A is designed with state-of-the-art technology to fulfill LCD application needs, especially for hand-held products.

特性 Features

GPLB301 can emulate varieties of GPLB3x series, The GPLB301 is able to emulate the following series via options.Body selectedALLGPLB30AGPLB32AGPLB33AGPLB33BGPLB37AGPLB38BRAM Size4288 Bytes2752 Bytes1215 Bytes1216 Bytes1024 Bytes1216 Bytes1216 BytesOTP Size512K Bytes96K Bytes512K Bytes64K Bytes96K Bytes256K Bytes512K BytesWake-up Sources6666565Interrupt Sources7777575UARTYesYesYesYes-Yes-Serial SRAM InterfaceYesYesYesYes-Yes-BUS Memory InterfaceYesYes-----Voltage Regulator for External Memory DevicesYesYes-----Segment74707452787464Common32163216163216LCD Dots23681120236883276823681024Bias1/5, 1/61/51/5, 1/61/51/3, 1/4, 1/51/5, 1/6185Duty1/16, 1/321/161/16, 1/321/161/4, 1/8, 1/161/16,1/321/16LCD RAM296 Bytes140 Bytes296 Bytes104 Bytes96 Bytes296 Bytes128 BytesMax. I/O Pins30292824242812PA[7:0][7:0][7:0][7:0][7:0][7:0][7:0]PB[7:0][7:0][5:0][7:0][7:0][5:0]-PC[7:0][7:0][7:0][7:0][7:0][7:0][7:4]PD[5:0][4:0][5:0]--[5:0]-Dedicated I/OsPA[0:7], PB[0:7], PC[0:7]PA[0:4]PA[0:5]PA[0:6]PA[0:7], PC[0:1]PA[0:5]PA[0:7], PC[7:4]Shared Pin I/Os: PA-PA[5:7] / SEG[69:67]PA[6:7] / SEG[63:62]PA[7] / SEG[51]PB[0:7] / SEG[41:34]PA[6:7] / SEG[63:62]-Shared Pin I/Os: PB-PB[0:7] / BMI AD BUS[0:7] / SEG[64:57]PB[0:5] / SEG[69:64] / COM[21:16]PB[0:7] / SEG[46:39]PC[2:7] / SEG[47:42]PB[0:5] / SEG[69:64] / COM[21:16]-Shared Pin I/Os: PC[0:1]-PC[0:1] / BMI MC[0:1] / SSRAM SDA, SCKPC[0:1] / SSRAM SCK, SDA / SEG [61:60]PC[0:1] / SSRAM SCK, SDA-PC[0:1] / SSRAM SCK, SDA / SEG[61:60]-Shared Pin I/Os: PC[2:3]-PC[2:3] / UART Tx / Rx / SEG[66:65]PC[2:3] / UART Tx / RxPC[2:3] / UART Tx / Rx-PC[2:3] / UART Tx / Rx Shared Pin I/Os: PC[4:5]-PC[4:5] / SEG[56:55] / Ext_I, Ext_CKPC[4:5] / SEG[73:72] / COM[25:24] / Ext_I, Ext_CKPC[4:5] / SEG[50:49] / Ext_I, Ext_CK-PC[4:5] / SEG[73:72] / COM[25:24] / Ext_I, Ext_CK-Shared Pin I/Os: PC[6:7]-PC[6:7] / SEG[54:53]PC[6:7] / SEG[71:70] / COM[23:22]PC[6:7] / SEG[48:47]-PC[6:7] / SEG[71:70] / COM[23:22]-Shared Pin I/Os: PDPD[0:5] / COM[31:26]PD[0:4] / SEG[52:48]PD[0:5] / COM[31:26]--PD[0:5] / COM[31:26]-Body selectedALLGPLB30AGPLB32AGPLB33AGPLB33BGPLB37AGPLB38BShared Pin