GPL833F12A数据手册Generalplus中文资料规格书

描述 Description

The GPL833F12A, an 8-bit microprocessor, features 96KB flash memory, 3072 bytes working RAM, 384 bytes LCD RAM, 16 dedicated I/Os, 24 COM/SEG shared I/Os, interrupt/ wakeup controller, four 16-bit timers, SPI interface, one 8-channel SAR ADC with 12-bit resolution for general-purpose application, and automatic display controller/driver for mono LCD. The GPL833F12A contains up to 64 segments and 24 commons, forming a maximum of 1536 dots LCD resolution. GPL833F12A operates over a wide voltage range from 1.8V through 3.6V, and a Low Voltage Reset function to assure system keeps operating properly when power drops below certain level. Moreover, there is one In-circuit emulator (ICE) with two pins to facilitate full speed in-system debug.

特性 Features

• 8-bit microprocessor
• 96K-byte Flash with high endurance
• Minimum 200,000 program/erase cycles
• Minimum 20 years data retention
• 1KB page size
• Supports self-erasing and self-programming
• Security bit supported
• 3072-byte SRAM
• 384-byte LCD RAM
• Operating voltage: 1.8V – 3.6V
• Built-in X’tal 32.768KHz oscillator circuit for real time clock function and system operating clock
• Built-in PLL 2.048MHZ/4.096MHZ/8.192MHZ for system operating clock
• Programmable CPU clock: 1, /2, /4, /8, for X’tal 32768Hz or PLL.
• Internal built-in regulator to supply core power (1.8V, for 3-battery application).
• Programmable LCD driver
• Up to 64 segments and 24 commons, forming a maximum of 1536 dots LCD resolution
• Supports from 1/2 duty up to 1/24 duty
• 384 bytes dedicated LCD RAM
• Supports normal type-B and type-C LCD waveform with or without key scan
• Built-in voltage regulator to generate VLCD for LCD driver
• Supports 1/2 1/3 1/4 1/5 bias
• 16-level contrast control (VLCD=VDD~6.5V)
• Low Voltage Detector 4-level (1.9V/2.0V/2.2V/2.6V) voltage detector
• Low Voltage Reset
• Power saving SLEEP mode
• Power saving HALT mode
• One 8-channel 12-bit resolution ADC
• Capacitor sensing touch hardware for 32 I/Os
• In-circuit emulator (ICE) supports on-chip debug, programming and erasing flash memory
• Peripherals
• Max. 40 I/O pins (PA[7:0], PB[7:0], PC[7:0], PD[7:0], PE[7:0]) Dedicated I/Os: PA[7:0], PB[7:0] Shared pin I/Os: PC[7:0]/COM[16:23] PD[7:0]/SEG[0:7] PE[7:0]/SEG[8:15]
• Key wakeup/interrupt function
• Built-in 2x RFC function ( PB2 or PB6 as input, PB7 PB[5:4] or PB1 PB[3:0] as output)
• Time base generator
• Stop Watch Timer
• Total of four 16-bit reloadable timer/counters, including two 16-bit general-purpose timers/counters and two touch-sensing timers (can be released for general-purpose use).
• Watchdog timer
• 4-channel PWMIO output
• Serial Peripheral Interface(SPI)
• Universal Asynchronous Receiver/Transmitter (UART)
• I2C (master / slaver mode)
• EL light driver