DSP56F803BU80E数据手册恩XP中文资料规格书

描述 Description

The 56F803, a member of the 56800 core-based family of Digital Signal Controllers, combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip. This creates an extremely cost-effective solution for servo and motor control, power inverter and converter applications.
The 56800 core is based on a Harvard-style architecture consisting of three execution units which operate in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP- and MCU-style applications. The instruction set is also highly efficient for C compilers, enabling rapid development of optimized control applications

特性 Features

Integrated Program Flash and Data Flash Memories
• Advanced Pulse Width Modulation
• Dual Analog to Digital Converters
• Programmable 16-bit timers
• 8MHz Crystal Oscillator and PLL with integrated pre and post scalars
• On-board power conversion and management
• NXP® Scalable CAN Module
• Serial communications interface module (SCI)
• Serial peripheral interface module (SPI)
• GPIO
• JTAG/OnCE Debug Programming Interface

应用 Application

Power & Energy
•Switched Mode Power Supply