24-Bit Digital Signal Processor

The DSP56311 is intended for applications requiring a large amount of internal memory, such as networking and wireless infrastructure applications. The onboard EFCOP can accelerate general filtering applications, such as echo-cancellation applications, correlation, and general-purpose convolution

文件：1.66698 Mbytes 页数：96 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

24-Bit Digital Signal Processor

Features • Up to 150 million multiply-accumulates per second (MMACS) (300 MMACS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 V core and 3.3 V I/O • Object code compatible with the DSP56000 core with highly parallel instruction set • Data arithmetic logic unit (Data AL

文件：2.062429 Mbytes 页数：96 Pages

恩XP

DSP56311 Device Errata for Mask

文件：230.66 Kbytes 页数：14 Pages

Motorola

摩托罗拉

24-bit General Embedded DSP

The DSP56311 is designed with developers of multi-channel communication and networking systems in mind. With 300 million multiply accumulates per second (MMACS) operating performance, the 24-bit DSP56311 DSP offers excellent performance density characteristic of DSP56300 devices—maximizing the numbe High-performance DSP56300 core:\n\n•150 MMACS (300 MIPS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 volts\n\n•Object code compatible with the DSP56000 core with highly parallel instruction set\n\n•Data arithmetic logic unit (data ALU) with fully pipelined 24 x 24-bit paral;

恩XP

恩智浦

24-Bit Digital Signal Processor

Features • Up to 150 million multiply-accumulates per second (MMACS) (300 MMACS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 V core and 3.3 V I/O • Object code compatible with the DSP56000 core with highly parallel instruction set • Data arithmetic logic unit (Data AL

文件：2.062429 Mbytes 页数：96 Pages

恩XP

24-Bit Digital Signal Processor

Features • Up to 150 million multiply-accumulates per second (MMACS) (300 MMACS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 V core and 3.3 V I/O • Object code compatible with the DSP56000 core with highly parallel instruction set • Data arithmetic logic unit (Data AL

文件：2.062429 Mbytes 页数：96 Pages

恩XP

24-Bit Digital Signal Processor

The DSP56311 is intended for applications requiring a large amount of internal memory, such as networking and wireless infrastructure applications. The onboard EFCOP can accelerate general filtering applications, such as echo-cancellation applications, correlation, and general-purpose convolution

文件：1.66698 Mbytes 页数：96 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

24-Bit Digital Signal Processor

The DSP56311 is intended for applications requiring a large amount of internal memory, such as networking and wireless infrastructure applications. The onboard EFCOP can accelerate general filtering applications, such as echo-cancellation applications, correlation, and general-purpose convolution

文件：1.66698 Mbytes 页数：96 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

24-Bit Digital Signal Processor

Features • Up to 150 million multiply-accumulates per second (MMACS) (300 MMACS using the EFCOP in filtering applications) with a 150 MHz clock at 1.8 V core and 3.3 V I/O • Object code compatible with the DSP56000 core with highly parallel instruction set • Data arithmetic logic unit (Data AL

文件：2.062429 Mbytes 页数：96 Pages

恩XP

DSP56311 Device Errata for Mask

文件：230.66 Kbytes 页数：14 Pages

Motorola

摩托罗拉