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DSP56002RC40中文资料Motorola数据手册PDF规格书
DSP56002RC40规格书详情
The DSP56002 and the DSP56L002 are MPU-style general purpose Digital Signal Processors (DSPs), composed of an efficient 24-bit digital signal processor core, program and data memories, various peripherals, and support circuitry.
DSP56002/L002 Features
Digital Signal Processing Core
• Efficient, object code compatible, 24-bit 56000-Family DSP engine
— Up to 33 Million Instructions Per Second (MIPS) – 30.3 ns instruction cycle at 66 MHz
— Up to 198 Million Operations Per Second (MOPS) at 66 MHz
— Performs a 1024-point complex Fast Fourier Transform (FFT) in 59,898 clocks
— Highly parallel instruction set with unique DSP addressing modes
— Two 56-bit accumulators including extension byte
— Parallel 24 × 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)
— Double precision 48 × 48-bit multiply with 96-bit result in 6 instruction cycles
— 56-bit Addition/Subtraction in 1 instruction cycle
— Fractional and integer arithmetic with support for multiprecision arithmetic
— Hardware support for block-floating point FFT
— Hardware nested DO loops
— Zero-overhead fast interrupts (2 instruction cycles)
— Four 24-bit internal data buses and three 16-bit internal address buses for maximum information transfer on-chip
Memory
• On-chip Harvard architecture permitting simultaneous accesses to program and two data memories
• 512 × 24-bit on-chip program RAM and 64 × 24-bit bootstrap ROM
• Two 256 × 24-bit on-chip data RAMs
• Two 256 × 24-bit on-chip data ROMs containing sine, A-law and µ-law tables
• External memory expansion with 16-bit address and 24-bit data buses
• Bootstrap loading from external data bus, Host Interface, or Serial Communications Interface
Peripheral and Support Circuits
• Byte-wide Host Interface (HI) with direct memory access support
• Synchronous Serial Interface (SSI) to communicate with codecs and synchronous serial devices
— Up to 32 software-selectable time slots in network mode
• Serial Communication Interface (SCI) for full-duplex asynchronous communications
• 24-bit Timer/Event Counter also generates and measures digital waveforms
• On-chip peripheral registers memory mapped in data memory space
• Double buffered peripherals
• Up to 25 general purpose I/O (GPIO) pins
• Three external interrupt request pins; one non-maskable
• On-Chip Emulation (OnCE) port for unobtrusive, processor speed-independent debugging
• Software-programmable, Phase-Locked Loop-based (PLL) frequency synthesizer for the core clock
• Power-saving Wait and Stop modes
• Fully static, HCMOS design for operating frequencies from 66 MHz or 40 MHz down to DC
• 132-pin Ceramic Pin Grid Array (PGA) package; 13 × 13 array
• 132-pin Plastic Quad Flat Pack (PQFP) surface-mount package; 24 × 24 × 4 mm
• 144-pin Thin Quad Flat Pack (TQFP) surface-mount package; 20 × 20 × 1.4 mm
• 3.3 V (DSP56L002) and 5 V (DSP56002) Power supply options
产品属性
- 型号:
DSP56002RC40
- 制造商:
MOTOROLA
- 制造商全称:
Motorola, Inc
- 功能描述:
24-BIT DIGITAL SIGNAL PROCESSOR
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
FREESCA |
BGAQFP |
6688 |
15 |
现货库存 |
询价 | ||
MOT |
2023+ |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 | |||
MOT |
2020+ |
QFP80 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
Freescale |
2020+ |
QFP |
35000 |
新到原装货,专营系列:查询请Q我 |
询价 | ||
MOTOROLA |
2016+ |
TQFP1414 |
8880 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
MOTOROLA/摩托罗拉 |
23+ |
QFP |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
询价 | ||
MOTOROLA |
2023+ |
SMD |
3708 |
安罗世纪电子只做原装正品货 |
询价 | ||
MOT |
21+ |
QFP80 |
417 |
原装现货假一赔十 |
询价 | ||
MOTOROLA |
23+ |
PGA |
3000 |
全新原装、诚信经营、公司现货销售 |
询价 | ||
FREESCAL |
23+ |
BGAQFP |
8659 |
原装公司现货!原装正品价格优势. |
询价 |