DS90CR288A

+3.3V 上升沿数据选通 LVDS 28 位频道链接接收器 - 85MHz; • 20 to 85 MHz Shift Clock Support\n• 50% Duty Cycle on Receiver Output Clock\n• 2.5 / 0 ns Set & Hold Times on TxINPUTs\n• Low Power Consumption\n• ±1V Common-Mode Range (around +1.2V)\n• Narrow Bus Reduces Cable Size and Cost\n• Up to 2.38 Gbps Throughput\n• Up to 297.5 Mbytes/sec Bandwidth\n• 345 mV (typ) Swing LVDS Devices for Low EMI\n• PLL Requires no External Components\n• Rising Edge Data Strobe\n• Compatible with TIA/EIA-644 LVDS Standard\n• Low Profile 56-Lead TSSOP Package;

The DS90CR287 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The DS90CR288A receiver converts the four LVDS data streams back into 28 bits of LVCMOS/LVTTL data. At a transmit clock frequency of 85 MHz, 28 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the data throughput is 2.38 Gbit/s (297.5 Mbytes/sec).This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.

DS90CR288A

28-Bit Channel Link-85MHz

DS90CR288A

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

DS90CR288AMTD

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHZ

DS90CR288AMTD

3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

DS90CR288AMTD

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

DS90CR288AMTD/NOPB

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

DS90CR288AMTDSLASHNOPB

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

DS90CR288AMTDX

20 to 85 MHz Shift Clock Support, 50 Duty Cycle on Receiver Output Clock

DS90CR288AMTDX

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz