DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver

文件：1.14605 Mbytes 页数：18 Pages

TI

德州仪器

3V LVDS Dual CMOS Differential Line Receiver

文件：247.01 Kbytes 页数：10 Pages

NSC

国半

3V LVDS Dual CMOS Differential Line Receiver

文件：727.12 Kbytes 页数：10 Pages

NSC

国半

丝印：90LV028ATM；Package：SOIC；DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

丝印：90LV028ATM；Package：SOIC；DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

丝印：90LV028ATM；Package：SOIC；DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

丝印：90LV028ATM；Package：SOIC；DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

文件：1.032099 Mbytes 页数：28 Pages

TI

德州仪器