3-V LVDS Quad CMOS Differential Line Receiver

文件：1.19432 Mbytes 页数：22 Pages

TI

德州仪器

DS90LV048A 3V LVDS Quad CMOS Differential Line Receiver

文件：1.03005 Mbytes 页数：20 Pages

TI

德州仪器

DS90LV048A 3V LVDS Quad CMOS Differential Line Receiver

文件：1.03005 Mbytes 页数：20 Pages

TI

德州仪器

3V LVDS Quad CMOS Differential Line Receiver

文件：245.57 Kbytes 页数：11 Pages

NSC

国半

3V LVDS Quad CMOS Differential Line Receiver

文件：260.91 Kbytes 页数：11 Pages

NSC

国半

丝印：DS90LV048ATM；Package：SOIC；DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver

1 Features 1• > 400-Mbps (200-MHz) Switching Rates • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low Pow

文件：850.6 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DS90LV048ATM；Package：SOIC；DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver

1 Features 1• > 400-Mbps (200-MHz) Switching Rates • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low Pow

文件：850.6 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DS90LV048ATM；Package：SOIC；DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver

1 Features 1• > 400-Mbps (200-MHz) Switching Rates • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low Pow

文件：850.6 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DS90LV048ATM；Package：SOIC；DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver

1 Features 1• > 400-Mbps (200-MHz) Switching Rates • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low Pow

文件：850.6 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DS90LV048ATM；Package：SOIC；DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver

1 Features 1• > 400-Mbps (200-MHz) Switching Rates • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low Pow

文件：850.6 Kbytes 页数：25 Pages

TI

德州仪器