DS90CR286A中文资料+3.3V 上升沿数据选通 LVDS 28 位 Channel Link 接收器 - 66MHz数据手册TI规格书

描述 Description

The DS90CR286A receiver converts the four LVDS data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CR216A receiver that converts the three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the rising edge.The receiver LVDS clock operates at rates from 20 to 66 MHz. The device phase-locks to the input clock, samples the serial bit streams at the LVDS data lines, and converts them into parallel output data. At an incoming clock rate of 66 MHz, each LVDS input line is running at a bit rate of 462 Mbps, resulting in a maximum throughput of 1.848 Gbps for the DS90CR286A and 1.386 Gbps for the DS90CR216A.The DS90CR286A and DS90CR216A devices are enhanced over prior generation receivers and provide a wider data valid time on the receiver output. The use of these serial link devices is ideal for solving EMI and cable size problems associated with transmitting data over wide, high speed parallel LVCMOS interfaces. Both devices are offered in TSSOP packages.

特性 Features

• 20 to 66 MHz Shift Clock Support
• Best–in–Class Set and Hold Times on Rx Outputs
• Rx Power-Down Mode 7 kV (HBM), > 700 V (EIAJ)
• Compatible with TIA/EIA-644 LVDS Standard
• Operating Temperature: −40°C to 85°C
• Automotive Q Grade Available – AEC-Q100 Grade 3 Qualified

简介

DS90CR286A属于集成电路（IC）的专用。由TI制造生产的DS90CR286A专用该系列产品可提供所需的功能，用以将信息源/信宿连到各种复杂或范围狭窄应用中的传感器、变送器、致动器、传输介质或其他此类端点。例如，汽车安全气囊驱动器、车身控制和信息娱乐总线、自适应电缆均衡器、智能卡等等。