DS90CF383B中文资料+3.3V LVDS 发送器 24 位平板显示器 (FPD) 链路 - 65MHz数据手册TI规格书

描述 Description

The DS90CF383B transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 65 MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 227 Mbytes/sec. The DS90CF383B is fixed as a Falling edge strobe transmitter and will interoperate with a Falling edge strobe Receiver (DS90CF386) without any translation logic. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

特性 Features

• No Special Start-up Sequence Required Between Clock/Data and /PD Pins. Input Signal (Clock and Data) Can be Applied Either Before or After the Device is Powered.
• Support Spread Spectrum Clocking Up to 100KHz Frequency Modulation & Deviations of ±2.5% Center Spread or −5% Down Spread.
• \"Input Clock Detection\" Feature Will Pull All LVDS Pairs to Logic Low when Input Clock is Missing and When /PD Pin is Logic High.
• 18 to 68 MHz Shift Clock Support
• Best–in–Class Set & Hold Times on TxINPUTs
• Tx Power Consumption

简介

DS90CF383B属于集成电路（IC）的专用。由TI制造生产的DS90CF383B专用该系列产品可提供所需的功能，用以将信息源/信宿连到各种复杂或范围狭窄应用中的传感器、变送器、致动器、传输介质或其他此类端点。例如，汽车安全气囊驱动器、车身控制和信息娱乐总线、自适应电缆均衡器、智能卡等等。