3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS90C365AMT；Package：TSSOP；3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display Link-87.5 MHz

1FEATURES 23• Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365 • No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered. • Support Spread Spectrum Clocking up to 100kHz frequ

文件：663.87 Kbytes 页数：20 Pages

TI

德州仪器

DS90C383/DS90CF384 3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

General Description The DS90C383 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bit

文件：811.57 Kbytes 页数：30 Pages

TI

德州仪器