DS7838J数据手册TI中文资料规格书

描述 Description

General Description
The DS8838 is a quad high speed driver/receiver designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The external termination is intended to be 180Ω resistor from the bus to the +5V logic supply together with a 390Ω resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin current allows up to 27 driver/receiver pairs to utilize a common bus. The bus loading is unchanged when VCC = 0V. The receivers incorporate hysteresis to greatly enhance bus noise immunity. One two-input NOR gate is included to disable all drivers in a package simultaneously. Receiver performance is optimized for systems with bus rise and fall times ≤ 1.0 µs/V.

特性 Features

■ 4 totally separate driver/receiver pairs per package
■ 1V typical receiver input hysteresis
■ Receiver hysteresis independent of receiver output load
■ Guaranteed minimum bus noise immunity of 1.3V, 2V typ.
■ Temperature-insensitive receiver thresholds track bus logic levels
■ 20 µA typical bus terminal current with normal VCC or with VCC = 0V
■ Open collector driver output allows wire-OR connection
■ High speed
■ Series 74 TTL compatible driver and disable inputs and receiver outputs