DS25BR150TSDSLASHNOPB中文资料德州仪器数据手册PDF规格书

1FEATURES

2• DC - 3.125 Gbps Low Jitter, High Noise

Immunity, Low Power Operation

• On-Chip 100 Ω Input and Output Termination

Minimizes Insertion and Return Losses,

Reduces Component Count and Minimizes

Board Space

• 7 kV ESD on LVDS I/O Pins Protects Adjoining

Components

• Small 3 mm x 3 mm WSON-8 Space Saving

Package

APPLICATIONS

• Clock or Data Buffering / Repeating

• OC-48 / STM-16 Clock or Data Buffering /

Repeating

• InfiniBand

• FireWire

DESCRIPTION

The DS25BR150 is a single channel 3.125 Gbps

LVDS buffer optimized for high-speed signal

transmission over printed circuit boards and balanced

cables. Fully differential signal paths ensure

exceptional signal integrity and noise immunity.

The DS25BR150 is a buffer/repeater with very low

power consumption. Other LVDS devices with similar

IO characteristics and with signal conditioning

features include the following products. The

DS25BR110 features four levels of equalization for

use as an optimized receiver device, the DS25BR120

features four levels of pre-emphasis for use as an

optimized driver device, and the DS25BR100 features

both pre-emphasis and equalization for use as an

optimized repeater device.

Wide input common mode range allows the receiver

to accept signals with LVDS, CML and LVPECL

levels; the output levels are LVDS. A very small

package footprint requires a minimal space on the

board while the flow-through pinout allows easy board

layout. The differential inputs and outputs are

internally terminated with a 100Ω resistor to lower

device input and output return losses, reduce

component count, and further minimize board space.