DS1287中文资料Real-Time Clock数据手册ADI规格书

描述 Description

DESCRIPTION
The DS1287 Real Time Clock is designed to be a direct replacement for the MC146818A. For a complete
description of operating conditions, electrical and mechanical characteristics, bus timing, and pin descriptions see the DS12887 data sheet.FEATURES
•Drop-in replacement for IBM AT computer clock/calendar
•Pin compatible with the MC146818A
•Totally nonvolatile with over 10 years of operation in the absence of power
•Self-contained subsystem includes lithium, quartz, and support circuitry
•Counts seconds, minutes, hours, day of the week, date, month, and year with leap year compensation
•Binary or BCD representation of time, calendar, and alarm
•12- or 24-hour clock with AM and PM in 12-hour mode
•Daylight Savings Time option
•Selectable between Motorola and Intel bus timing
•Multiplex bus for pin efficiency
•Interfaced with software as 64 RAM locations
– 14 bytes of clock and control registers
– 50 bytes of general purpose RAM
•Programmable square wave output signal
•Bus-compatible interrupt signals (IRQ)
•Three interrupts are separately software-maskable and testable
– Time-of-day alarm once/second to once/day
– Periodic rates from 122 µs to 500 ms
– End of clock update cycle

特性 Features

•Drop-in replacement for IBM AT computer clock/calendar
•Pin compatible with the MC146818A
•Totally nonvolatile with over 10 years of operation in the absence of power
•Self-contained subsystem includes lithium, quartz, and support circuitry
•Counts seconds, minutes, hours, day of the week, date, month, and year with leap year compensation
•Binary or BCD representation of time, calendar, and alarm
•12- or 24-hour clock with AM and PM in 12-hour mode
•Daylight Savings Time option
•Selectable between Motorola and Intel bus timing
•Multiplex bus for pin efficiency
•Interfaced with software as 64 RAM locations
– 14 bytes of clock and control registers
– 50 bytes of general purpose RAM
•Programmable square wave output signal
•Bus-compatible interrupt signals (IRQ)
•Three interrupts are separately software-maskable and testable
– Time-of-day alarm once/second to once/day
– Periodic rates from 122 µs to 500 ms
– End of clock update cycle